1. Technical Field
The present disclosure relates to a semiconductor device and a fabricating method thereof, and more particularly, to a semiconductor device having a gate-all-around structure, and a fabricating method thereof.
2. Description of the Related Art
For semiconductor device density enhancement, gate-all-around structure has been suggested as one of the scaling technologies, according to which a silicon body in a nanowire shape is formed on a substrate, with a gate then being formed to surround the silicon body.
Such gate-all-around structure is easy to scale, as it uses three-dimensional channel. Further, current control capability can be enhanced without requiring increased gate length. Furthermore, it is possible to effectively suppress short channel effect (SCE) which is a phenomenon that the electric potential of the channel region is influenced by the drain voltage.